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NXP Semiconductors /LPC43xx /SGPIO /ENABLE_3

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Interpret as ENABLE_3

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https://regviz.com/r/NXP Semiconductors/LPC43xx/SGPIO/ENABLE_3#0x0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0ENABLE3_INPI0RESERVED

Description

Input bit match interrupt enable

Fields

ENABLE3_INPI

Input interrupt enable of slice n.
RESERVED

Reserved.

Links

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data